Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic devices. Memory may be volatile, which requires a power source to maintain its data, or non-volatile, which does not require an external power source to maintain its data. Volatile memory generally includes random-access memory (RAM), dynamic random access memory (DRAM), and synchronous dynamic random access memory (SDRAM), among others. Non-volatile memory generally includes NAND flash memory, NOR flash memory, read only memory (ROM), Electrically Erasable Programmable ROM (EEPROM), Erasable Programmable ROM (EPROM), and resistance variable memory such as phase change random access memory (PCRAM), resistive random access memory (RRAM), and magnetoresistive random access memory (MRAM), among others.
Memory devices can be combined together to form a storage volume of a memory system such as a solid state drive (SSD). A solid state drive can include non-volatile memory (e.g., NAND flash memory and NOR flash memory), and/or can include volatile memory (e.g., DRAM and SRAM), among various other types of non-volatile and volatile memory. An SSD can have advantages over hard drives in terms of performance, size, weight, operating temperature range, and power consumption. For example, SSDs can have superior performance when compared to magnetic disk drives due to their lack of moving parts, which may avoid seek time, latency, and other electro-mechanical delays associated with magnetic disk drives.
Memory devices generally include memory cells which are used to store data. A memory cell of a memory device can be programmed to a desired data state. For example, a single level cell (SLC) can be programmed to one of two data states, such as a logic high or binary “1” data state and a logic low or binary “0” data state. Multi-level cells (MLCs) can be programmed to one of more than two data states. For example, some Flash MLC memory cells can be programmed to one of three, four, eight, or sixteen data states, where each of these data states is represented by a respective quantity of electric charge placed on or removed from a charge storage structure (e.g., a floating gate). As such, MLCs can allow the manufacture of higher density memories without increasing the number of memory cells since each cell can be programmed to store more than one bit.
When data is transmitted from one location to another there is the possibility that an error may occur. Errors can also occur over time while data is stored in a memory. There are a number of techniques that can be used to encode data so that an error can be detected and/or corrected. Since data is routinely transmitted to and from memory, and stored therein, memory can employ error correction techniques to attempt to correct data associated with the memory. One type of error correction involves a low-density parity-check (LDDC) technique. Unencoded, or “raw,” data can be encoded into code words for transmission and/or storage. The code words can subsequently be decoded to recover the data. However, depending on the nature and extent of errors that occur to the encoded code word during transit and/or storage, a decoder may not be successful in properly decoding the code word. Error correction often involves redundant information, such as parity bits, appended to the data bits. The ratio of data bits to the total number of bits (data bits plus redundant information bits) is the code rate. ECCs with higher code rates often promote better error correction, but increase processing times and can lead to latency problems. Accordingly, efficient use of code rate is of concern when implementing an ECC.